HBM/DDR Subsystem Verification- Lead

Job Description Key Responsibilities: Develop and implement comprehensive verification plans for HBM4/4e IP and Subsystem. Create and maintain testbenches, test cases, and verification environments using System verilog and UVM methodology. Perform functional verification of RTL designs, including simulation, debugging, and coverage analysis. Collaborate with design engineers to understand design specifications and requirements for IP and subsystems. Identify and resolve design and verification …