Principal Engineer, Virtual Prototype Modelling

Key Responsibilities: Develop SystemC/TLM2.0 models for IP blocks, CPUs, SoCs, and complete systems. Define transaction-level models for processors, cache controllers, interconnects, peripherals, NPUs, and ISPs. Port operating systems to virtual prototypes and assist in device driver development. Verify models at both IP and SoC level using self-checking test suites in C and ARM assembly. Develop system-level flows and methodologies using virtual platforms. Collaborate with firmware and softwar…