Senior Yield Engineer: Defect Reduction & Optimization

Vanguard International Semiconductor Corporation (VIS) is seeking a Senior YE Engineer to supervise inline shift operations and drive for defect reduction and yield improvement. The role includes training technicians, maintaining SOPs, and performing advanced failure analyses with FIB/SEM/EDX to ensure wafer quality. The ideal candidate holds an engineering degree and has 2–8 years of fab experience in a multinational environment, with strong EHSS compliance and leadership abilities. J-18808-Lj…